95% off Digital IC Design Using System-Verilog / Verilog (Coupon)

Digital IC Design Using System-Verilog / Verilog - Udemy Coupon

Get Discount

Bonus: download a free guide that reveals 11 tricks for getting the biggest discounts on Udemy courses, including this course.

Coupon & course info

Course Name: Digital IC Design Using System-Verilog / Verilog

Subtitle: Learn RTL coding in Verilog or System -Veriog with one-to-one mapping between digital circuits and RTL programs.

Instructor: Taught by Ajith Jose, Hardware Engineer

Category: IT & Software

Subcategory: Hardware

Provided by: Udemy

Price: $16 (before discount)

Free coupon code: See above (no charge for coupon)

Review info & popularity

As of March 15, 2016…

Students: 9900 students enrolled

Ratings: 15 reviews

Rank: ranked #339 in Udemy IT & Software Courses

Brief course description

This course teaches the digital IC and ASIC design techniques used in VLSI industry using System Verilog language. It covers the basics of digital design techniques and teaches the basic concepts of using a hardware description language like System Verilog (SV) for IC design.

This course contains video lectures of 1 hour 45 minutes duration. It is stared by explaining a brief history of ICs and evolution of hardware description languages. The starting point learning System Verilog, “writing the first module” is explained here next. The remaining sessions of this course teaches you the SV language constructs, types of modelling and some illustrative examples. Implementation of sequential and combination digital circuits are explained in detail which will help the learner to grab the difficult ideas in using ‘assign’ & ‘always’ and ‘blocking’& ‘non-blocking assignments’ in SV.

By taking this course, the a student will be able to start digital design using Verilog or System Verilog and master it slowly. This course will also be helpful for the SV programmers who know how to write an SV program but not clear about how they actually get implemented to a hardware.

(Read more about this course on the official course page.)

Ajith Jose bio

A post graduate in electronics engineering with several years of industrial experience in ASIC design and Verification using System Verilog at major semiconductor companies. A passionate and continuous learner in emerging technologies in VSLI and also interested in other technical domains related to programming. Finds energy in learning new technologies and and sharing knowledge with others.

(Learn more about this instructor on the official course page.)

Recommended courses

If you like this course, you might also be interested in:

1. Hacking & Digital Forensics & Autopsy – Stay Annoymous

With Technology Advancement, staying anonymous and protecting your online and offline activities is critical,

Taught by Jon Webby, Professional Security Expert

2. Tableau Server Essentials: Skills for Server Administrators!

A step-by-step guide to the administrative functions a good Tableau Server Administrator needs to know!

Taught by Jane Crofts, Tableau Partner and Tableau Qualified Associate

3. Learn to create no cost multi-server dev environment on PC

Learn how to use VMware player to create multi server environment,create your development, testing, and production ….

Taught by Rashid Muhammad, Senior Business Intelligence Architect

4. Raspberry Pi Essentials and Extras

Dig a little deeper into the capabilities of this powerful little credit-card sized computer!

Taught by Wolf Donat, Engineer. Writer. Maker.

5. Computer Repair – A Guide For Beginners

Learn the skills necessary to optimize any PC and never again feel like you can’t fix your own computer or others.

Taught by Justin Gilson, I.T. Professional, Radio Host and All Around GEEK

Final details for this Udemy course

Languages: English

Skill level: Beginner Level

Lectures: 14 lessons

Duration: 2 Hours of video

What you get: Write System-Verilog RTL programs for designing ASICs and Digital ICs

Target audience: This System-Verilog course will be an ideal starting point towards learning RTL coding for Digital ICs and ASICs. The intended audience are students and professionals who are NOT experts in Verilog or System-Verilog IC design

Requirements: There are no prerequisites for this course but it is good to know basics of Digital circuits and programming in any language.

Access: Lifetime access

Peace of mind: 30 day money back guarantee

Availability: available online, as well as on iOS and Android

Download options: check course to see if you can download lessons