Coupon & course info
Course Name: Digital IC Design Using System-Verilog / Verilog
Subtitle: Learn RTL coding in Verilog or System -Veriog with one-to-one mapping between digital circuits and RTL programs.
Instructor: Taught by Ajith Jose, Hardware Engineer
Category: IT & Software
Provided by: Udemy
Price: $16 (before discount)
Free coupon code: See above (no charge for coupon)
Review info & popularity
As of March 15, 2016…
Students: 9900 students enrolled
Ratings: 15 reviews
Rank: ranked #339 in Udemy IT & Software Courses
Brief course description
This course teaches the digital IC and ASIC design techniques used in VLSI industry using System Verilog language. It covers the basics of digital design techniques and teaches the basic concepts of using a hardware description language like System Verilog (SV) for IC design.
This course contains video lectures of 1 hour 45 minutes duration. It is stared by explaining a brief history of ICs and evolution of hardware description languages. The starting point learning System Verilog, “writing the first module” is explained here next. The remaining sessions of this course teaches you the SV language constructs, types of modelling and some illustrative examples. Implementation of sequential and combination digital circuits are explained in detail which will help the learner to grab the difficult ideas in using ‘assign’ & ‘always’ and ‘blocking’& ‘non-blocking assignments’ in SV.
By taking this course, the a student will be able to start digital design using Verilog or System Verilog and master it slowly. This course will also be helpful for the SV programmers who know how to write an SV program but not clear about how they actually get implemented to a hardware.
(Read more about this course on the official course page.)
Ajith Jose bio
A post graduate in electronics engineering with several years of industrial experience in ASIC design and Verification using System Verilog at major semiconductor companies. A passionate and continuous learner in emerging technologies in VSLI and also interested in other technical domains related to programming. Finds energy in learning new technologies and and sharing knowledge with others.
(Learn more about this instructor on the official course page.)
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Final details for this Udemy course
Skill level: Beginner Level
Lectures: 14 lessons
Duration: 2 Hours of video
What you get: Write System-Verilog RTL programs for designing ASICs and Digital ICs
Target audience: This System-Verilog course will be an ideal starting point towards learning RTL coding for Digital ICs and ASICs. The intended audience are students and professionals who are NOT experts in Verilog or System-Verilog IC design
Requirements: There are no prerequisites for this course but it is good to know basics of Digital circuits and programming in any language.
Access: Lifetime access
Peace of mind: 30 day money back guarantee
Availability: available online, as well as on iOS and Android
Download options: check course to see if you can download lessons